ASYNC 2004 Special Add-on Session,
Talk 1:
CLASS: Clockless
Logic, Analysis, Synthesis and Systems - Reducing the Barrier to
Adoption of Clockless Design,
Roger Brees, Boeing.
Abstract
Clockless logic
technologies promise significant advantages for Department of Defense
ASIC design programs. These programs are characterized by a need
for low development cost, predictable schedules, and small design
teams, while achieving high levels of performance ,and low power.
The Clockless Logic, Analysis, Synthesis, and Systems (CLASS) program
is moving clockless logic methods into the mainstream. It is
developing the tools necessary for defense contractors to gain the
advantages of clockless logic without requiring a large investment in
retraining existing design teams. This paper will first present
the design challenges faced by DoD ASIC designers today and show how
clockless logic addresses them. Our approach for moving clockless
design into the mainstream by developing the required infrastructure
and demonstrating its effectivness is then presented.